DDR interfaces typically use several DLLs (DLLs) where each DLL drives several phase interpolators (PIs). Each PI is used to provide adjustable delay on a pin or a set of pins to help meet timing constraints.
During a period of inactivity, the DLLs are not shut down because of the long relock time involved (typically on the order of 100-200 ns). Some circuitry only powers down the DLL if the circuitry is shut down for long enough to allow the DLL to relock after being powered up.
In power down modes (e.g., DDR CKE power down), the exit latency frequently cannot be more than 10-20 ns. DLLs are not likely to be powered down if such a requirement exists. The total current consumed by the all the DLLs in a DDR port may be about 100 mA. This leads to a waste of power usage when the circuitry is inactive.
Often, DLLs can be reused in more than one application but with different bandwidth requirements. A DLL with a programmable bandwidth is suitable for design reuse which would greatly save time and cost of development.